A Fast Optimal Robust Path Delay Fault Testable Adder

Bernd Becker; Rolf Drechsler; Rolf Krieger; Sudhakar Reddy

doi:10.1109/EDTC.1996.494346

Back

Conference proceeding

A Fast Optimal Robust Path Delay Fault Testable Adder

Bernd Becker, Rolf Drechsler, Rolf Krieger and Sudhakar Reddy

Proceedings of the 1996 European conference on design and test, pp.491-498

EDTC '96

03/11/1996

DOI: 10.1109/EDTC.1996.494346

View Online

Abstract

In this paper we explore the test complexity of the adder function with respect to the robust path delay fault model. A lower bound of Omega(n2) for the cardinality of a complete test set for a combinational n-bit adder is proven. This result is valid for any adder design known until now. In addition we present a fast O(sqrt(n))-time adder that is fully robust path delay fault testable with a test set of size Theta(n^2).

test, adder, path delay fault model

Details

Title: Subtitle: A Fast Optimal Robust Path Delay Fault Testable Adder
Creators: Bernd Becker
Rolf Drechsler
Rolf Krieger
Sudhakar Reddy
Resource Type: Conference proceeding
Publication Details: Proceedings of the 1996 European conference on design and test, pp.491-498
Publisher: IEEE Computer Society
Series: EDTC '96
DOI: 10.1109/EDTC.1996.494346
ISSN: 1066-1409
eISSN: 2377-6323
Language: English
Date published: 03/11/1996
Academic Unit: Electrical and Computer Engineering
Record Identifier: 9984197440702771

Metrics

3 Record Views

2 Times Cited - Web of Science