A Memory-Efficient and Computation-Balanced Lossy Compressor on Wafer-Scale Engine

Shihui Song; Robert Underwood; Sheng Di; Yafan Huang; Peng Jiang; Franck Cappello

doi:10.1109/IPDPS64566.2025.00084

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Conference proceeding

A Memory-Efficient and Computation-Balanced Lossy Compressor on Wafer-Scale Engine

Shihui Song, Robert Underwood, Sheng Di, Yafan Huang, Peng Jiang and Franck Cappello

Proceedings - IEEE International Parallel and Distributed Processing Symposium, pp.1-13

International Parallel and Distributed Processing Symposium IPDPS

06/03/2025

DOI: 10.1109/IPDPS64566.2025.00084

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Abstract

Cerebras system has demonstrated immense potential across various scientific domains. However, modern scientific simulations frequently generate vast volumes of data in a short time, leading to bottlenecks in runtime performance and memory footprint. While an ultra-fast error-bounded lossy compressor can mitigate such limitations with high compression ratios and guaranteed data quality, deploying it into Cerebras dataflow architecture poses significant difficulties. Specifically, Cerebras faces memory challenges, such as the absence of shared memory and limited local memory, alongside computational challenges, including specialized parallelism and sensitivity to imbalanced workloads. In this work, we propose CERESZII, an error-bounded lossy compressor that computes within Cerebras system. CereSZ-II addresses these challenges with a carefully optimized four-stage compression workflow, consisting of Pre-quantization, Lightweight Prediction, Fixed-size Huffman Encoding, and Spatial-aware Offset Computation, ensuring both memory efficiency and computational balance. Evaluation of several real-world scientific datasets shows that CERESZ-II achieves over 800 GB/s throughput, delivering high compression ratios and reliable reconstructed data quality.

Engines

Parallel Processing

AI Processor

Computational efficiency

Data integrity

Dataflow Architecture

Error-bounded Lossy Compression

Faces

Memory management

Parallel Computing

Runtime

Semiconductor device reliability

Sensitivity

Throughput

Wafer-Scale Engine

Details

Title: Subtitle: A Memory-Efficient and Computation-Balanced Lossy Compressor on Wafer-Scale Engine
Creators: Shihui Song - University of Iowa
Robert Underwood - Argonne National Laboratory
Sheng Di - Argonne National Laboratory
Yafan Huang - University of Iowa
Peng Jiang - University of Iowa
Franck Cappello - Argonne National Laboratory
Resource Type: Conference proceeding
Publication Details: Proceedings - IEEE International Parallel and Distributed Processing Symposium, pp.1-13
Series: International Parallel and Distributed Processing Symposium IPDPS
DOI: 10.1109/IPDPS64566.2025.00084
ISSN: 1530-2075
eISSN: 1530-2075
Publisher: IEEE
Grant note: U.S. Department of Energy, Office of Science, Advanced Scientific Computing Research (ASCR): DE-AC02-06CH11357 National Science Foundation: 2311875, 2104023
The material was supported by the U.S. Department of Energy, Office of Science, Advanced Scientific Computing Research (ASCR), under contract DE-AC02-06CH11357. This material was also supported by the National Science Foundation under Grant Nos. CSSI/OAC# 2311875 and CSSI/OAC# 2104023. We acknowledge the technical support of Leighton Wilson from Cerebras Systems Inc., and Mei-Yu Wang and Julian Uran from the Pittsburgh Supercomputing Center, whose expertise and assistance were instrumental in the development of this work.
Language: English
Date published: 06/03/2025
Academic Unit: Computer Science
Record Identifier: 9984927080602771

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