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A postprocessing procedure to reduce the number of different test lengths in a test set for scan circuits
Conference proceeding

A postprocessing procedure to reduce the number of different test lengths in a test set for scan circuits

Irith Pomeranz and Sudhakar M Reddy
Proceedings 10th Asian Test Symposium, pp.131-136
2001
DOI: 10.1109/ATS.2001.990271

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Abstract

Built-in self-test Circuit faults Circuit testing Cities and towns Switches Test pattern generators Upper bound

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