A synthesis procedure for flexible logic functions

I Pomeranz; S.M Reddy

doi:10.1109/DATE.1998.655995

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Conference proceeding

A synthesis procedure for flexible logic functions

I Pomeranz and S.M Reddy

Proceedings Design, Automation and Test in Europe, pp.973-974

1998

DOI: 10.1109/DATE.1998.655995

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Abstract

In most applications of digital logic circuits, the circuit function is either specified (0,1) or unspecified (don't - care) for every input condition. However, there are also applications where any one of a subset of functions is an acceptable solution, even though it is not possible to represent all the functions in terms of output don't-cares. In this case, we say that the function is flexible. In this work, we propose a synthesis procedure for flexible functions based on functional blocks called comparison units.

Application software

Circuit synthesis

Cities and towns

Counting circuits

Electrical fault detection

Fault detection

Flexible printed circuits

Logic circuits

Logic functions

Minimization

Details

Title: Subtitle: A synthesis procedure for flexible logic functions
Creators: I Pomeranz - Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
S.M Reddy
Resource Type: Conference proceeding
Publication Details: Proceedings Design, Automation and Test in Europe, pp.973-974
Publisher: IEEE
DOI: 10.1109/DATE.1998.655995
ISSN: 1530-1591
eISSN: 1558-1101
Language: English
Date published: 1998
Academic Unit: Electrical and Computer Engineering
Record Identifier: 9984197276902771

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