Conference proceeding
An Enhanced Logic BIST Architecture for Online Testing
2008 14th IEEE International On-Line Testing Symposium, pp.10-15
07/2008
DOI: 10.1109/IOLTS.2008.48
Abstract
The objective of using logic BIST for online and periodic testing is to identify defects, like opens, resulting from the wear and tear of the circuit. We have shown that existing test sets have a low coverage for open defects located in scan flip-flops, even though such defects may affect functional operation. Existing Logic BIST structures suffer from the same limitations. A novel Logic BIST architecture to detect such defects is proposed. Unlike other sequences, like checking experiments, the enhancements are simple and independent of the circuit under test.
Details
- Title: Subtitle
- An Enhanced Logic BIST Architecture for Online Testing
- Creators
- F Yang - University of IowaS Chakravarty - LSI CorporationN Devta-PrasannaS.M Reddy - University of IowaI Pomeranz - Purdue University West Lafayette
- Resource Type
- Conference proceeding
- Publication Details
- 2008 14th IEEE International On-Line Testing Symposium, pp.10-15
- DOI
- 10.1109/IOLTS.2008.48
- ISSN
- 1942-9398
- eISSN
- 1942-9401
- Publisher
- IEEE
- Language
- English
- Date published
- 07/2008
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197357502771
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