Conference proceeding
COREL: a dynamic compaction procedure for synchronous sequential circuits with repetition and local static compaction
Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001, pp.142-147
2001
DOI: 10.1109/ICCD.2001.955016
Abstract
We propose a dynamic compaction procedure for non-scan synchronous sequential circuits. The procedure combines four compaction techniques. (1) Dynamic ordering of test subsequences generated for yet-undetected faults. (2) Local static compaction is performed every time a new subsequence is added to the test sequence. (3) Short test subsequences are discarded to prevent them from increasing the test length unnecessarily. (4) The test generation process is repeated with a fault order dynamically determined based on the existing test sequence. With these techniques, dynamic compaction yields test lengths that are shorter than all but the most aggressive and computationally expensive static compaction procedure.
Details
- Title: Subtitle
- COREL: a dynamic compaction procedure for synchronous sequential circuits with repetition and local static compaction
- Creators
- Irith Pomeranz - Purdue University West LafayetteSudhakar M Reddy - University of Iowa
- Resource Type
- Conference proceeding
- Publication Details
- Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001, pp.142-147
- DOI
- 10.1109/ICCD.2001.955016
- ISSN
- 1063-6404
- eISSN
- 2576-6996
- Publisher
- IEEE
- Language
- English
- Date published
- 2001
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197304702771
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