Conference proceeding
Cache size selection for performance, energy and reliability of time-constrained systems
Proceedings of the 2006 Asia and South Pacific Design Automation Conference, Vol.2006, pp.923-928
ASP-DAC '06
01/24/2006
DOI: 10.1145/1118299.1118507
Abstract
Improving performance, reducing energy consumption and enhancing reliability are three important objectives for embedded computing systems design. In this paper, we study the joint impact of cache size selection on these three objectives. For this purpose, we conduct extensive fault injection experiments on five benchmark examples using a cycle-accurate processor simulator. Performance and reliability are analyzed using the performability metric. Overall, our experiments demonstrate the importance of a careful cache size selection when designing energy-efficient and reliable systems. Furthermore, the experimental results show the existence of optimal or Pareto-optimal cache size selection to optimize the three design objectives.
Details
- Title: Subtitle
- Cache size selection for performance, energy and reliability of time-constrained systems
- Creators
- Yuan Cai - University of IowaMarcus Schmitz - University of SouthamptonAlireza Ejlali - University of SouthamptonBashir Al-HashimiSudhakar Reddy - Universit of Iowa
- Resource Type
- Conference proceeding
- Publication Details
- Proceedings of the 2006 Asia and South Pacific Design Automation Conference, Vol.2006, pp.923-928
- Series
- ASP-DAC '06
- DOI
- 10.1145/1118299.1118507
- Publisher
- IEEE Press
- Language
- English
- Date published
- 01/24/2006
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197456102771
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