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Circuit lines for guiding the generation of random test sequences for synchronous sequential circuits
Conference proceeding

Circuit lines for guiding the generation of random test sequences for synchronous sequential circuits

Irith Pomeranz and Sudhakar Reddy
Proceedings of the 2008 Asia and South Pacific Design Automation Conference, pp.641-646
ASP-DAC '08
01/21/2008
DOI: 10.1109/ASPDAC.2008.4484030

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