Conference proceeding
Combinationally irredundant ISCAS-89 benchmark circuits
1996 IEEE International Symposium on Circuits and Systems (ISCAS), Vol.4, pp.632-634
01/01/1996
DOI: 10.1109/ISCAS.1996.542103
Abstract
We describe a procedure to remove combinationally redundant faults from a sequential circuit. The procedure removes gates, primary inputs, primary outputs and flip-flops, such that the resulting circuit is equivalent to the original circuit (by the definition given in a previous work). We present experimental results of the application of this procedure to ISCAS-89 benchmark circuits. The resulting circuits are available through anonymous ftp from ftp.eng.uiowa.edu in directory 'pub/reddy/irrckts'.
Details
- Title: Subtitle
- Combinationally irredundant ISCAS-89 benchmark circuits
- Creators
- Seiji KajiharaKozo KinoshitaIrith PomeranzSudhakar M Reddy
- Resource Type
- Conference proceeding
- Publication Details
- 1996 IEEE International Symposium on Circuits and Systems (ISCAS), Vol.4, pp.632-634
- DOI
- 10.1109/ISCAS.1996.542103
- ISSN
- 0271-4310
- Language
- English
- Date published
- 01/01/1996
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197907002771
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