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Combinationally irredundant ISCAS-89 benchmark circuits
Conference proceeding

Combinationally irredundant ISCAS-89 benchmark circuits

Seiji Kajihara, Kozo Kinoshita, Irith Pomeranz and Sudhakar M Reddy
1996 IEEE International Symposium on Circuits and Systems (ISCAS), Vol.4, pp.632-634
01/01/1996
DOI: 10.1109/ISCAS.1996.542103

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Abstract

We describe a procedure to remove combinationally redundant faults from a sequential circuit. The procedure removes gates, primary inputs, primary outputs and flip-flops, such that the resulting circuit is equivalent to the original circuit (by the definition given in a previous work). We present experimental results of the application of this procedure to ISCAS-89 benchmark circuits. The resulting circuits are available through anonymous ftp from ftp.eng.uiowa.edu in directory 'pub/reddy/irrckts'.

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