Conference proceeding
Computationally efficient design of the MAE equalizer for binary signaling
2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR), pp.939-943
11/2011
DOI: 10.1109/ACSSC.2011.6190148
Abstract
This paper proposes a computationally efficient approach to designing the maximum asymptotic efficiency (MAE) equalizer, which minimizes bit error rate as the signal-to-noise ratio approaches infinity. The MAE equalizer is implemented as a tapped delay line and hence has the same runtime complexity as the simple MMSE linear equalizer. However, design of the MAE equalizer involves finding the minimum distance between two convex hulls. Its design complexity is exponential in the length of channel and equalizer, making it impractical for long channels. The proposed method exploits the relationship between the channel vectors and the convex hull formed by the noise-free channel outputs to design the MAE equalizer directly from the channel coefficients without requiring a search of the convex hull. The equalizer design complexity is reduced to O(N logN), where N is determined by the length of the channel and equalizer. Simulation results reveal the dramatic decrease in design complexity.
Details
- Title: Subtitle
- Computationally efficient design of the MAE equalizer for binary signaling
- Creators
- Weiwei Zhou - George Mason UniversityJill K Nelson - George Mason UniversityAnanya Sen Gupta
- Resource Type
- Conference proceeding
- Publication Details
- 2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR), pp.939-943
- Publisher
- IEEE
- DOI
- 10.1109/ACSSC.2011.6190148
- ISSN
- 1058-6393
- eISSN
- 2576-2303
- Language
- English
- Date published
- 11/2011
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197332602771
Metrics
10 Record Views