Detectability of internal bridging faults in scan chains

F Yang; S Chakravarty; N Devta-Prasanna; S.M Reddy; I Pomeranz

doi:10.1109/ASPDAC.2009.4796558

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Conference proceeding

Detectability of internal bridging faults in scan chains

F Yang, S Chakravarty, N Devta-Prasanna, S.M Reddy and I Pomeranz

2009 Asia and South Pacific Design Automation Conference, pp.678-683

01/2009

DOI: 10.1109/ASPDAC.2009.4796558

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Abstract

Scan chains contain a high percentage of the transistors in logic parts of VLSI designs. Nevertheless, faults inside scan cells are not directly targeted by scan based tests currently used, and they are assumed to be detected by what are called flush tests. Recently we investigated the detectability of stuck-at, stuck-on and stuck-open faults internal to scan chains using existing tests. We also proposed new flush tests and appropriate ordering of flush tests to achieve higher fault coverage. In this paper, we investigate detection of a set of scan cell internal bridging faults extracted from layout. We show that the detection of some zero-resistance non-feedback bridging faults requires two-pattern tests. Half-speed flush tests we proposed earlier to improve the coverage of stuck-at, stuck-on and stuck-open faults also detect additional bridging faults. We classify the undetectable faults based on the reasons for their undetectability. We observe that the driver strengths of the scan cell inputs can be optimized to improve the bridging fault coverage. Both zero-resistance and nonzero-resistance bridging fault models are considered in this work. A low power supply voltage based test method and IDDQ testing are examined for resistive bridging fault detection.

Automatic test pattern generation

Bridge circuits

Circuit faults

Circuit testing

Cities and towns

Electrical fault detection

Fault detection

Low voltage

Power supplies

Sequential analysis

Details

Title: Subtitle: Detectability of internal bridging faults in scan chains
Creators: F Yang - University of Iowa
S Chakravarty - LSI Corp., Milpitas, CA
N Devta-Prasanna - LSI Corp., Milpitas, CA
S.M Reddy - University of Iowa
I Pomeranz - Purdue University West Lafayette
Resource Type: Conference proceeding
Publication Details: 2009 Asia and South Pacific Design Automation Conference, pp.678-683
Publisher: IEEE
DOI: 10.1109/ASPDAC.2009.4796558
ISSN: 2153-6961
eISSN: 2153-697X
Language: English
Date published: 01/2009
Academic Unit: Electrical and Computer Engineering
Record Identifier: 9984197554902771

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