EXOP (Extended Operation): A new logical fault model for digital circuits

I Pomeranz; S.M Reddy

doi:10.1109/FTCS.1993.627320

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Conference proceeding

EXOP (Extended Operation): A new logical fault model for digital circuits

I Pomeranz and S.M Reddy

FTCS-23 The Twenty-Third International Symposium on Fault-Tolerant Computing, pp.166-175

International Symposium on Fault-Tolerant Computing, 23 (Toulouse, France, 06/22/1993 - 06/24/1993)

1993

DOI: 10.1109/FTCS.1993.627320

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Abstract

A gate-level fault model for digital circuits is proposed that generalizes previous models and is expected to model defects not included in other fault models. Theoretical discussions and experimental results are presented to show the effectiveness of a test set for the new fault model in achieving very high coverage of commonly used single and multiple faults. It is shown that test generation for this model can be done by a simple reordering of a stuck-at fault test set (possibly repeating some of the stuck-at tests). Reordering is based on defining a graph over the set of all stuck-at tests and finding an Euler cycle in the graph in time which is polynomial in the number of tests.

Polynomials

Circuit faults

Circuit testing

Cities and towns

Delay

Digital circuits

Fault detection

FETs

Semiconductor device modeling

Details

Title: Subtitle: EXOP (Extended Operation): A new logical fault model for digital circuits
Creators: I Pomeranz - University of Iowa
S.M Reddy
Resource Type: Conference proceeding
Publication Details: FTCS-23 The Twenty-Third International Symposium on Fault-Tolerant Computing, pp.166-175
Conference: International Symposium on Fault-Tolerant Computing, 23 (Toulouse, France, 06/22/1993 - 06/24/1993)
Publisher: IEEE
DOI: 10.1109/FTCS.1993.627320
ISSN: 0731-3071
eISSN: 2375-124X
Language: English
Date published: 1993
Academic Unit: Electrical and Computer Engineering
Record Identifier: 9984198003102771

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