Conference proceeding
Efficient SAT-Based Circuit Initialization for Larger Designs
2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, pp.62-67
01/2014
DOI: 10.1109/VLSID.2014.18
Abstract
We present a procedure to determine initialization sequences for a sequential circuit optimizing sequence length and unknown values (Xes) in the flip-flops. Specifically, we consider the following two problems: (1) Determine a sequence that initializes a maximal set of flip-flops starting in a completely unknown state. (2) Determine a minimal subset of flip-flops that need to be controllable such that the circuit can be completely initialized in a limited number of time frames. The underlying principle of our methods is a maximization formalism using formal optimization techniques based on satisfiability solvers (MaxSAT). We introduce several heuristics which increase the scalability of our approach significantly. Experimental results demonstrate the applicability of the method for large academic and industrial benchmark circuits with up to a few hundred thousand gates.
Details
- Title: Subtitle
- Efficient SAT-Based Circuit Initialization for Larger Designs
- Creators
- Matthias Sauer - University of FreiburgSven Reimer - University of FreiburgSudhakar M Reddy - University of IowaBernd Becker - University of Iowa
- Resource Type
- Conference proceeding
- Publication Details
- 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, pp.62-67
- Publisher
- IEEE
- DOI
- 10.1109/VLSID.2014.18
- ISSN
- 1063-9667
- eISSN
- 2380-6923
- Language
- English
- Date published
- 01/2014
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197448202771
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