Conference proceeding
Estimating the relative single stuck-at fault coverage of test sets for a combinational logic block from its functional description
Sixth IEEE International High-Level Design Validation and Test Workshop, Vol.2001-, pp.31-35
2001
DOI: 10.1109/HLDVT.2001.972804
Abstract
When the gate-level description of a logic block is unknown, it may become necessary to estimate the gate-level stuck-at fault coverage of a test set for the block by using a fault coverage metric that does not require simulation of gate-level faults. We propose such a metric based on stuck-at faults on primary inputs of the block We show that the proposed metric is accurate in predicting the relative gate-level stuck-at fault coverage of different test sets.
Details
- Title: Subtitle
- Estimating the relative single stuck-at fault coverage of test sets for a combinational logic block from its functional description
- Creators
- Irith Pomeranz - Purdue University West LafayetteSudhakar M Reddy - University of Iowa
- Resource Type
- Conference proceeding
- Publication Details
- Sixth IEEE International High-Level Design Validation and Test Workshop, Vol.2001-, pp.31-35
- DOI
- 10.1109/HLDVT.2001.972804
- ISSN
- 1552-6674
- eISSN
- 2471-7827
- Publisher
- IEEE
- Language
- English
- Date published
- 2001
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197409102771
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