GALLOP: genetic algorithm based low power FSM synthesis by simultaneous partitioning and state assignment

G Venkataraman; S.M Reddy; I Pomeranz

doi:10.1109/ICVD.2003.1183189

Back

Conference proceeding

GALLOP: genetic algorithm based low power FSM synthesis by simultaneous partitioning and state assignment

G Venkataraman, S.M Reddy and I Pomeranz

16th International Conference on VLSI Design, 2003. Proceedings, Vol.2003-, pp.533-538

2003

DOI: 10.1109/ICVD.2003.1183189

View Online

Abstract

Partitioning has been shown to be an effective method for synthesis of low power finite state machines. In this approach, an FSM is partitioned into two or more coupled sub-machines such that most of the time only one of the sub-machines is active. In this paper, we present a GA based approach for simultaneous partitioning and state assignment of finite state machines with power reduction as the objective. Experimental results obtained compare favorably with previous works on FSM partitioning, low power state assignment as well as using GA for partitioning alone.

Automata

Circuit synthesis

Cities and towns

Cost function

Encoding

Flip-flops

Genetic algorithms

Minimization

Power dissipation

Sequential circuits

Details

Title: Subtitle: GALLOP: genetic algorithm based low power FSM synthesis by simultaneous partitioning and state assignment
Creators: G Venkataraman - University of Iowa
S.M Reddy - University of Iowa
I Pomeranz
Resource Type: Conference proceeding
Publication Details: 16th International Conference on VLSI Design, 2003. Proceedings, Vol.2003-, pp.533-538
Publisher: IEEE
DOI: 10.1109/ICVD.2003.1183189
ISSN: 1063-9667
eISSN: 2380-6923
Language: English
Date published: 2003
Academic Unit: Electrical and Computer Engineering
Record Identifier: 9984197277902771

Metrics

8 Record Views

18 Times Cited - Web of Science