Conference proceeding
Hardware support for the Seamless programming model
[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation, pp.353-360
The Fourth Symposium on the Frontiers of Massively Parallel Computation, 4 (McLean, Virginia, 10/19/1992–10/22/1992)
1992
DOI: 10.1109/FMPC.1992.234939
Abstract
The communication latency problem is presented with special emphasis on RISC (reduced instruction set computer) based multiprocessors. An interprocessor communication model for parallel programs based on locality is presented. This model enables the programmer to manipulate locality at the language level and to take advantage of currently available system hardware to reduce latency. A hardware node architecture for a latency-tolerant RISC-based multiprocessor, called Seamless, that supports this model, is presented. The Seamless architecture includes the addition of a hardware locality manager to each processing element, as well as an integral runtime environment and compiler.< >
Details
- Title: Subtitle
- Hardware support for the Seamless programming model
- Creators
- S.A Fineberg - University of IowaT.L Casavant - University of IowaB.H Pease - University of Iowa
- Resource Type
- Conference proceeding
- Publication Details
- [Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation, pp.353-360
- Conference
- The Fourth Symposium on the Frontiers of Massively Parallel Computation, 4 (McLean, Virginia, 10/19/1992–10/22/1992)
- DOI
- 10.1109/FMPC.1992.234939
- Publisher
- IEEE Comput. Soc. Press
- Language
- English
- Date published
- 1992
- Academic Unit
- Roy J. Carver Department of Biomedical Engineering; Electrical and Computer Engineering
- Record Identifier
- 9984197906902771
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