Sign in
Improving the Detectability of Resistive Open Faults in Scan Cells
Conference proceeding

Improving the Detectability of Resistive Open Faults in Scan Cells

Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M Reddy and Irith Pomeranz
2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp.383-391
10/2009
DOI: 10.1109/DFT.2009.30

View Online

Abstract

Automatic test pattern generation Circuit faults Circuit testing Electrical fault detection Fault detection faults in scan cells high temperature testing Integrated circuit interconnections leakage current effects resistive open faults System testing Temperature USA Councils Very large scale integration

Details

Metrics

Logo image