Low-complexity fault simulation under the multiple observation time testing approach

I Pomeranz; S.M Reddy

doi:10.1109/TEST.1995.529842

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Conference proceeding

Low-complexity fault simulation under the multiple observation time testing approach

I Pomeranz and S.M Reddy

Proceedings of 1995 IEEE International Test Conference (ITC), pp.272-281

International Test Conference (ITC) (Washington, DC, USA, 10/21/1995 - 10/25/1995)

1995

DOI: 10.1109/TEST.1995.529842

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Abstract

The use of three-value logic for fault simulation of synchronous sequential circuits may incur a loss of accuracy that would cause the fault coverage to be underestimated. In addition, loss of fault coverage may occur due to the test strategy employed. These problems were previously alleviated at the cost of high computational complexity. We present an observation that allows us to alleviate loss of fault coverage in many cases, at a computational cost similar to conventional three-value fault simulation. The proposed simulation procedure is compared to a previously proposed one to demonstrate its effectiveness.

Circuit faults

Circuit simulation

Circuit testing

Cities and towns

Computational efficiency

Computational modeling

Fault detection

Logic testing

Sequential analysis

Sequential circuits

Details

Title: Subtitle: Low-complexity fault simulation under the multiple observation time testing approach
Creators: I Pomeranz - University of Iowa
S.M Reddy - University of Iowa
Resource Type: Conference proceeding
Publication Details: Proceedings of 1995 IEEE International Test Conference (ITC), pp.272-281
Conference: International Test Conference (ITC) (Washington, DC, USA, 10/21/1995 - 10/25/1995)
Publisher: IEEE
DOI: 10.1109/TEST.1995.529842
ISSN: 1089-3539
eISSN: 2378-2250
Language: English
Date published: 1995
Academic Unit: Electrical and Computer Engineering
Record Identifier: 9984197919402771

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