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Multiple fault activation cycle tests for transistor stuck-open faults
Conference proceeding

Multiple fault activation cycle tests for transistor stuck-open faults

N Devta-Prasanna, A Gunda, S M Reddy and I Pomeranz
2010 IEEE International Test Conference, pp.1-1
11/2010
DOI: 10.1109/TEST.2010.5699313

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Abstract

Circuit faults Clocks Delay Flip-flops Logic gates Testing Transistors

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