On Testing Delay Faults In Macro-based Combinational Circuits

Conference proceeding

Peer reviewed

I Pomeranz and S.M Reddy

IEEE/ACM International Conference on Computer-Aided Design, pp.332-339

International Conference on Computer Aided Design (ICCAD) (San Jose, California, 11/06/1994 - 11/10/1994)

1994

DOI: 10.1109/ICCAD.1994.629813

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Circuit faults

Circuit testing

Cities and towns

Combinational circuits

Delay effects

Hardware

Integrated circuit interconnections

Logic circuits

Propagation delay

Semiconductor device testing

Title: Subtitle: On Testing Delay Faults In Macro-based Combinational Circuits
Creators: I Pomeranz
S.M Reddy
Resource Type: Conference proceeding
Publication Details: IEEE/ACM International Conference on Computer-Aided Design, pp.332-339
Conference: International Conference on Computer Aided Design (ICCAD) (San Jose, California, 11/06/1994 - 11/10/1994)
Publisher: IEEE Comput. Soc. Press
DOI: 10.1109/ICCAD.1994.629813
ISSN: 1063-6757
eISSN: 2376-8584
Language: English
Date published: 1994
Academic Unit: Electrical and Computer Engineering
Record Identifier: 9984198006602771

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