Conference proceeding
On cancelling the effects of logic sharing for improved path delay fault testability
INTERNATIONAL TEST CONFERENCE 1996, PROCEEDINGS, pp.357-366
1996
DOI: 10.1109/TEST.1996.556982
Abstract
Sharing of logic among the various primary outputs of a circuit reduces the overall size of the circuit. However, shared logic may have adverse effects on the number of paths and on the path delay fault testability of the circuit. In this work, we propose a procedure to reverse the effects of logic sharing when it causes a significant increase in the number of paths and a significant reduction in testability. Experimental results show that the proposed procedure is apr effective preprocessing step of global optimization, that increases the effectiveness of resynthesis procedures based on local transformations.
Details
- Title: Subtitle
- On cancelling the effects of logic sharing for improved path delay fault testability
- Creators
- I PomeranzS M ReddyIEEE COMP SOC
- Resource Type
- Conference proceeding
- Publication Details
- INTERNATIONAL TEST CONFERENCE 1996, PROCEEDINGS, pp.357-366
- DOI
- 10.1109/TEST.1996.556982
- Language
- English
- Date published
- 1996
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984231871102771
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