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On efficient X-handling using a selective compaction scheme to achieve high test response compaction ratios
Conference proceeding

On efficient X-handling using a selective compaction scheme to achieve high test response compaction ratios

Huaxing Tang, Chen Wang, Janusz Rajski, Sudhakar M Reddy, Jerzy Tyszer and Irith Pomeranz
18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design, pp.59-64
International Conference on VLSI Design, 18 (Kolkata, India, 01/03/2005–01/07/2005)
2005
DOI: 10.1109/ICVD.2005.127

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Abstract

We propose an enhanced selective compaction scheme, which integrates three techniques, called selectively filled tests, selective chains masking and selective chains observation, to reduce the impact of unknown values on the test response compaction ratio. Experimental results on several industrial designs demonstrate the effectiveness of the proposed scheme in achieving a very high test response compaction ratio without compromising the test quality.
Circuit faults Circuit testing Cities and towns Compaction Fault detection Flip-flops Graphics Joining processes Linear circuits Test data compression

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