Conference proceeding
On maximizing the fault coverage for a given test length limit in a synchronous sequential circuit
Proceedings. 21st VLSI Test Symposium, 2003, Vol.2003-, pp.173-178
2003
DOI: 10.1109/VTEST.2003.1197648
Abstract
When storage requirements or limits on test application time do not allow a complete (compact) test set to be used for a circuit, a partial test set that detects as many faults as possible is required. Motivated by this application, we address the following problem. Given a test sequence T of length L for a synchronous sequential circuit and a length M<L, find a test sequence T/sub S/ of length at most M such that the fault coverage of T/sub S/ is maximal. A similar problem was considered before for combinational and scan circuits, and solved by test ordering. Test ordering is not possible with the single test sequence considered here. We solve this problem by using a vector omission process that allows the length of the sequence T to be reduced while allowing controlled reductions in the number of detected faults. In this way, it is possible to obtain a sequence T/sub S/ that has the desired length and a maximal fault coverage.
Details
- Title: Subtitle
- On maximizing the fault coverage for a given test length limit in a synchronous sequential circuit
- Creators
- Irith Pomeranz - Purdue University West LafayetteSudhakar M Reddy - IEEE#TAB#
- Resource Type
- Conference proceeding
- Publication Details
- Proceedings. 21st VLSI Test Symposium, 2003, Vol.2003-, pp.173-178
- DOI
- 10.1109/VTEST.2003.1197648
- ISSN
- 1093-0167
- eISSN
- 2375-1053
- Publisher
- IEEE
- Language
- English
- Date published
- 2003
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197223802771
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