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On removing redundant faults in synchronous sequential circuits
Conference proceeding

On removing redundant faults in synchronous sequential circuits

X J Lin, I Pomeranz, S M Reddy and IEEE COMP SOC
16TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, pp.168-175
1998
DOI: 10.1109/VTEST.1998.670865

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Abstract

We describe a time-efficient procedure for removing sequentially redundant faults from synchronous sequential circuits with synchronizing sequences. We use properties of redundant faults and propose several methods to identify subsets of redundant faults that can be removed simultaneously from the circuit. By removing several redundant faults simultaneously, the number of repetitions of the test generation procedure invoiced to identify redundant faults is reduced. Experimental results presented in this work demonstrate the effectiveness of the proposed removal procedure.

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