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On the Switching Activity in Faulty Circuits During Test Application
Conference proceeding

On the Switching Activity in Faulty Circuits During Test Application

Irith Pomeranz and Sudhakar M Reddy
2016 IEEE 25th Asian Test Symposium (ATS), pp.13-18
11/2016
DOI: 10.1109/ATS.2016.12

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Abstract

Circuit faults Clocks Computational modeling Delays functional broadside test Logic gates low-power test Switches switching activity Switching circuits test generation

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