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Reducing the storage requirements of a test sequence by using a background vector
Conference proceeding

Reducing the storage requirements of a test sequence by using a background vector

Irith Pomeranz and Sudhakar M Reddy
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), pp.1237-1242
03/2010
DOI: 10.1109/DATE.2010.5456996

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Abstract

Circuit simulation Circuit testing Cities and towns Compaction Encoding Genetic mutations Manufacturing Sequential analysis Sequential circuits Synchronous generators

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