Session details: Logic verification and optimization

Conference proceeding

S Reddy

Proceedings of the 19th ACM Great Lakes symposium on vlsi

GLSVLSI '09

Great Lakes Symposium on VLSI, 19 (Boston, Massachusetts, 05/10/2009–05/12/2009)

05/10/2009

DOI: 10.1145/3253760

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Title: Subtitle: Session details: Logic verification and optimization
Creators: S Reddy - University of Iowa
Resource Type: Conference proceeding
Publication Details: Proceedings of the 19th ACM Great Lakes symposium on vlsi
Conference: Great Lakes Symposium on VLSI, 19 (Boston, Massachusetts, 05/10/2009–05/12/2009)
Series: GLSVLSI '09
DOI: 10.1145/3253760
Publisher: ACM
Language: English
Date published: 05/10/2009
Academic Unit: Electrical and Computer Engineering
Record Identifier: 9984198015402771

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