Conference proceeding
Test generation for synchronous sequential circuits based on fault extraction
Computer-Aided Design: International Conference on (ICCAD '91), pp.450-453
01/01/1992
Abstract
The authors describe an efficient procedure for translating stuck-at faults in a gate level implementation into state-table faults in a state-table description of the circuit. Based on this fault procedure, a test generation approach is presented for stuck-at faults, which results in short test sequences and achieves complete coverage of stuck-at faults. Experimental results are given for both MCNC and ISCAS-89 benchmark circuits, to demonstrate the applicability of the method.
Details
- Title: Subtitle
- Test generation for synchronous sequential circuits based on fault extraction
- Creators
- Irith PomeranzSudhakar M Reddy
- Resource Type
- Conference proceeding
- Publication Details
- Computer-Aided Design: International Conference on (ICCAD '91), pp.450-453
- Language
- English
- Date published
- 01/01/1992
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197908802771
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