Conference proceeding
Test vector chains for increased targeted and untargeted fault coverage
Proceedings of the 2008 Asia and South Pacific Design Automation Conference, pp.663-666
ASP-DAC '08
01/21/2008
DOI: 10.1109/ASPDAC.2008.4484034
Abstract
We introduce the concept of test vector chains, which allows us to obtain new test vectors from existing ones through single-bit changes without any test generation effort. We demonstrate that a test set T 0 has a significant number of test vector chains that are effective in increasing the numbers of detections of target faults, i.e., faults targeted during the generation of T 0 , as well as untargeted faults, i.e., faults that were not targeted during the generation of T 0.
Details
- Title: Subtitle
- Test vector chains for increased targeted and untargeted fault coverage
- Creators
- Irith PomeranzSudhakar Reddy
- Resource Type
- Conference proceeding
- Publication Details
- Proceedings of the 2008 Asia and South Pacific Design Automation Conference, pp.663-666
- Publisher
- IEEE Computer Society Press
- Series
- ASP-DAC '08
- DOI
- 10.1109/ASPDAC.2008.4484034
- ISSN
- 2153-6961
- eISSN
- 2153-697X
- Language
- English
- Date published
- 01/21/2008
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197105502771
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