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Testing delay faults in embedded CAMs
Conference proceeding

Testing delay faults in embedded CAMs

Xiaogang Du, Sudhakar M Reddy, Joseph Rayhawk and Wu-Tung Cheng
2003 Test Symposium, Vol.2003-, pp.378-383
2003
DOI: 10.1109/ATS.2003.1250841

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Abstract

Critical paths are analyzed in a CAM and minimum test patterns are proposed to detect delay faults in a CAM. The test patterns derived are shown to be covered by the basic algorithm proposed earlier in (G. Giles et al, Proc. Int. Test Conf. p.471-474, 1985).
Associative memories Logic circuit testing Self-testing

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