Vector-based functional fault models for delay faults

I Pomeranz; S.M Reddy

doi:10.1109/ATS.1999.810727

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Conference proceeding

Vector-based functional fault models for delay faults

I Pomeranz and S.M Reddy

Proceedings Eighth Asian Test Symposium (ATS'99), pp.41-46

Asian Test Symposium, 8 (Shanghai, China, 11/18/1999)

1999

DOI: 10.1109/ATS.1999.810727

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Abstract

Several functional delay fault models have been proposed before to allow functional test generation for delay faults. In this work, we extend these models to accommodate functional descriptions where inputs and outputs are more naturally represented by vectors carrying non-binary values. Such vectors are typical of high-level functional descriptions. Experimental results show that using the vector-based models does not result in loss of gate-level path delay fault coverage.

Circuit faults

Circuit testing

Cities and towns

Combinational circuits

Design for testability

Fault detection

Hardware

Logic testing

Propagation delay

Robustness

Details

Title: Subtitle: Vector-based functional fault models for delay faults
Creators: I Pomeranz - University of Iowa
S.M Reddy
Resource Type: Conference proceeding
Publication Details: Proceedings Eighth Asian Test Symposium (ATS'99), pp.41-46
Conference: Asian Test Symposium, 8 (Shanghai, China, 11/18/1999)
Publisher: IEEE
DOI: 10.1109/ATS.1999.810727
ISSN: 1081-7735
eISSN: 2377-5386
Language: English
Date published: 1999
Academic Unit: Electrical and Computer Engineering
Record Identifier: 9984197909302771

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