Journal article
An efficient nonenumerative method to estimate the path delay fault coverage in combinational circuits
IEEE transactions on computer-aided design of integrated circuits and systems, Vol.13(2), pp.240-250
02/1994
DOI: 10.1109/43.259947
Abstract
A method to estimate the coverage of path delay faults of a given test set, without enumerating paths, is proposed. The method is polynomial in the number of lines in the circuit, and thus allows circuits with large numbers of paths to be considered under the path delay fault model. Several levels of approximation, with increasing accuracy and increasing polynomial complexity, are proposed. Experimental results are presented to show the effectiveness and accuracy of the estimate in evaluating the path delay fault coverage. Combining this nonenumerative estimation method with a test generation method for path delay faults would yield a cost effective method to consider path delay faults in large circuits, which are beyond the capabilities of existing test generation and fault simulation procedures, that are based on enumeration of paths.< >
Details
- Title: Subtitle
- An efficient nonenumerative method to estimate the path delay fault coverage in combinational circuits
- Creators
- I Pomeranz - University of IowaS.M Reddy - University of Iowa
- Resource Type
- Journal article
- Publication Details
- IEEE transactions on computer-aided design of integrated circuits and systems, Vol.13(2), pp.240-250
- Publisher
- IEEE
- DOI
- 10.1109/43.259947
- ISSN
- 0278-0070
- eISSN
- 1937-4151
- Language
- English
- Date published
- 02/1994
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197548202771
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