Journal article
Array control for high-performance SIMD systems
Journal of parallel and distributed computing, Vol.64(3), pp.400-413
03/01/2004
DOI: 10.1016/j.jpdc.2003.09.007
Abstract
Although arrays of SIMD processing elements can be built with very high operating frequencies, problems exist in keeping the array busy. The inherent mismatch between host and array makes it difficult to maintain high array utilization: either the rate of instruction issue is very low or PE data locality is compromised, having the same effect. Our solution is based on an array control unit (ACU) design that expands macroinstructions in two stages, first by data tile and then into microinstructions. The expansion itself solves the issue problem; decoupling the expansion modalities maintains data locality. Several issues involving host/ACU interaction need to be resolved to effect this solution. We present experimental results showing that our approach delivers substantial improvement in memory hierarchy performance: a cache of only one-fourth the size is sufficient to achieve the same performance as previous approaches. We also describe our implementations which demonstrate that achieving gigaherz operating frequencies with current technologies is plausible.
Details
- Title: Subtitle
- Array control for high-performance SIMD systems
- Creators
- Martin C. Herbordt - Boston UniversityJade Cravy - GDAHonghai Zhang - University of Iowa
- Resource Type
- Journal article
- Publication Details
- Journal of parallel and distributed computing, Vol.64(3), pp.400-413
- Publisher
- Elsevier Inc
- DOI
- 10.1016/j.jpdc.2003.09.007
- ISSN
- 0743-7315
- eISSN
- 1096-0848
- Language
- English
- Date published
- 03/01/2004
- Academic Unit
- The Iowa Institute for Biomedical Imaging
- Record Identifier
- 9984627205702771
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