Journal article
Design of Two-Level Fault-Tolerant Networks
IEEE transactions on computers, Vol.C-23(1), pp.41-48
01/1974
DOI: 10.1109/T-C.1974.223775
Abstract
Some new techniques for the synthesis of fault-tolerant two-level combinational networks are presented. Two classes of faults are defined, 1) critical faults and 2) subcritical faults. Critical fauls are the class of faults that cannot be tolerated by any two-level networks. Necessary conditions for synthesis of networks tolerating subcritical faults are developed. As a result it is established that the conditions required for tolerating faults in the logic elements and those required for tolerating faults in the primary inputs are significantly different. Several design techniques are presented and it is shown that if we restrict our class of faults, then certain normally assumed conditions on redundancy can be relaxed. A class of hazards is defined. It is shown that the synthesis of certain hazard-free realizations is equivalent to the fault-tolerant realization, and also an upper bound on the redundancy of the fault-tolerant realization is derived.
Details
- Title: Subtitle
- Design of Two-Level Fault-Tolerant Networks
- Creators
- D.K Pradhan - University of SaskatchewanS.M Reddy
- Resource Type
- Journal article
- Publication Details
- IEEE transactions on computers, Vol.C-23(1), pp.41-48
- Publisher
- IEEE
- DOI
- 10.1109/T-C.1974.223775
- ISSN
- 0018-9340
- eISSN
- 1557-9956
- Language
- English
- Date published
- 01/1974
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197287602771
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