Journal article
Deterministic Stellar BIST for Automotive ICs
IEEE transactions on computer-aided design of integrated circuits and systems, Vol.39(8), pp.1699-1710
08/2020
DOI: 10.1109/TCAD.2019.2925353
Abstract
As the automotive industry enters a period of rapid evolution changing the way cars are designed and produced, the number of complex safety-critical components deployed in advanced driver assistance systems or autonomous vehicles is progressively rising with high-end models containing around 120 MCUs. These integrated circuits must adhere to stringent requirements for high quality and long-term reliability driven by functional safety standards. This requires test solutions that address challenges posed by automotive electronics. This paper presents Stellar BIST-a next generation compression scheme for in-system automotive test. The proposed solution can work with any sequential test compression. It builds on a finding that certain clusters of test vectors are capable of detecting many random-resistant faults, where a cluster consists of a parent (base) pattern and its transformed derivatives. Stellar BIST involves generating vectors based on simultaneous and multiple complements of scan slices of encodable parent patterns. The multiple complements are also skewed between successive patterns to diversify the resultant tests. The new scheme elevates compression to values unachievable through conventional reseeding-based solutions and provides significant tradeoffs between storage requirements and test application time, critical for in-system automotive applications. The experimental results obtained for industrial designs and different fault models illustrate feasibility of the proposed test scheme and are reported herein.
Details
- Title: Subtitle
- Deterministic Stellar BIST for Automotive ICs
- Creators
- Yingdi Liu - Mentor GraphicsNilanjan Mukherjee - Mentor GraphicsJanusz Rajski - Mentor GraphicsSudhakar M Reddy - University of IowaJerzy Tyszer - Poznań University of Technology
- Resource Type
- Journal article
- Publication Details
- IEEE transactions on computer-aided design of integrated circuits and systems, Vol.39(8), pp.1699-1710
- DOI
- 10.1109/TCAD.2019.2925353
- ISSN
- 0278-0070
- eISSN
- 1937-4151
- Publisher
- IEEE
- Grant note
- 08/81/DSPB/8133 / Polish Ministry of Science and Higher Education
- Language
- English
- Date published
- 08/2020
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197333302771
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