Journal article
Efficient multiple path propagating tests for delay faults
Journal of electronic testing, Vol.7(3), pp.157-172
12/1995
DOI: 10.1007/BF00995311
Abstract
This paper presents a test generation procedure for obtainingmaximal multiple-path-propagating robust tests, which detect the largest possible number of path faults simultaneously. Specialized heuristics are used to facilitate the generation of such tests in two-level circuits, and methods are given for extensions to multi-level circuits. Experimental results are presented to demonstrate the efficacy of this approach, which is seen to significantly reduce test-set lengths for path delay faults by generating highlyefficient robust tests. Limitations of the method are discussed, together with suggestions for future research.
Details
- Title: Subtitle
- Efficient multiple path propagating tests for delay faults
- Creators
- Ankan K PramanickSudhakar M Reddy
- Resource Type
- Journal article
- Publication Details
- Journal of electronic testing, Vol.7(3), pp.157-172
- DOI
- 10.1007/BF00995311
- ISSN
- 0923-8174
- eISSN
- 1573-0727
- Language
- English
- Date published
- 12/1995
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984083246502771
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