Journal article
On the design of pseudoexhaustive testable PLA's
IEEE transactions on computers, Vol.37(4), pp.468-472
1988
DOI: 10.1109/12.2193
Abstract
A method is presented to design pseudoexhaustive testable (PET) PLAs (programmable logic arrays) that are suitable for BIST (built-in self-test) environments. The key idea of the design is to partition inputs and product lines into groups. During testing, a group of inputs and a group of product lines are selected and tested exhaustively. The proposed design leads to small test sizes and relatively small area overhead. Experimental results on 30 PLAs, comparing test set sizes and area overhead of different BIST PLA designs, are reported.
Details
- Title: Subtitle
- On the design of pseudoexhaustive testable PLA's
- Creators
- DONG SAM HA - Dept. of Electr. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USAS. M Reddy - Virginia polytech. inst. state univ., dep. electrical eng., Blacksburg VA 24061, United States
- Resource Type
- Journal article
- Publication Details
- IEEE transactions on computers, Vol.37(4), pp.468-472
- Publisher
- Institute of Electrical and Electronics Engineers
- DOI
- 10.1109/12.2193
- ISSN
- 0018-9340
- eISSN
- 1557-9956
- Language
- English
- Date published
- 1988
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984198009802771
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