Journal article
PROPTEST: a property-based test generator for synchronous sequential circuits
IEEE transactions on computer-aided design of integrated circuits and systems, Vol.22(8), pp.1080-1091
08/2003
DOI: 10.1109/TCAD.2003.814953
Abstract
We describe a property-based test generation procedure for synchronous sequential circuits. Several techniques are used to generate test sequences that achieve high fault coverages at low computational complexity. These include the use of static test compaction, input vector holding with optimal numbers of hold cycles, input vector perturbation, and identification of subsequences that are useful in extending the test sequence. Experimental results presented demonstrate that the proposed procedure achieves fault coverages which are in all cases the same or higher than those achieved by existing procedures.
Details
- Title: Subtitle
- PROPTEST: a property-based test generator for synchronous sequential circuits
- Creators
- Ruifeng Guo - IntelS.M ReddyI Pomeranz
- Resource Type
- Journal article
- Publication Details
- IEEE transactions on computer-aided design of integrated circuits and systems, Vol.22(8), pp.1080-1091
- Publisher
- IEEE
- DOI
- 10.1109/TCAD.2003.814953
- ISSN
- 0278-0070
- eISSN
- 1937-4151
- Language
- English
- Date published
- 08/2003
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197320702771
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