Journal article
Scan-Based Delay Test Types and Their Effect on Power Dissipation During Test
IEEE transactions on computer-aided design of integrated circuits and systems, Vol.27(2), pp.398-403
02/2008
DOI: 10.1109/TCAD.2007.907231
Abstract
The peak power dissipated in nonscan logic during fast capture cycles of scan-based two-pattern tests for path delay faults is considered. It is first demonstrated that the peak-power dissipation for an enhanced-scan test set, which has the smallest peak-power dissipation, is lower than that for a skewed-load test set and that the peak-power dissipation for a skewed-load test set, which has the smallest peak-power dissipation, is typically (but not always) lower than that for a broadside test set. Test sets that consist of more than one type of tests are then considered. Skewed-load and broadside tests may be used together to improve the fault coverage when this is permissible by a standard scan design. It is demonstrated that using both types of tests can sometimes reduce the peak-power dissipation. Results are also presented of an experiment where an arbitrary test set of one type is modified to reduce the peak power without reducing the fault coverage by introducing tests of another type.
Details
- Title: Subtitle
- Scan-Based Delay Test Types and Their Effect on Power Dissipation During Test
- Creators
- Irith Pomeranz - Purdue University West LafayetteSudhakar M Reddy - University of Iowa
- Resource Type
- Journal article
- Publication Details
- IEEE transactions on computer-aided design of integrated circuits and systems, Vol.27(2), pp.398-403
- DOI
- 10.1109/TCAD.2007.907231
- ISSN
- 0278-0070
- eISSN
- 1937-4151
- Publisher
- IEEE
- Language
- English
- Date published
- 02/2008
- Academic Unit
- Electrical and Computer Engineering
- Record Identifier
- 9984197345102771
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