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Test enrichment for path delay faults using multiple sets of target faults
Journal article   Peer reviewed

Test enrichment for path delay faults using multiple sets of target faults

Irith Pomeranz and Sudhakar M Reddy
IEEE transactions on computer-aided design of integrated circuits and systems, Vol.22(1), pp.82-90
01/2003
DOI: 10.1109/TCAD.2002.805726

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Abstract

Automatic testing Circuit faults Circuit simulation Circuit testing Compaction Delay Design automation Electrical fault detection Fault detection

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